Y305 PLC I/O Modules Technical Manual

Applies to Y305-4400, Y305-4421, Y305-8800, and Y305-8821. PLC devices and special registers address program data, analog I/O, serial communication, and clock functions. Hardware options determine which physical functions are available.

Isolate actuators before writes or program transfer. Use the User Manual for wiring and the Programming Guide for the first program.

Specification · User Manual · Documentation Index

Contents

1. Program and output control
2. PLC devices and instructions
3. Analog registers and scaling
4. RS485 configuration
5. Modbus addresses and data
6. ADPRW and RS instructions
7. High-speed functions and RTC
8. PID parameters

1. Program and output control

Use GX Works2 with the software version, project settings, interface, and instruction set specified for the unit. An FX3U-style device name does not guarantee identical behavior to another PLC.

A Y-device write or D8050 write can operate a physical output. Direct host writes can also conflict with PLC logic. Application command registers, interlocks, acknowledgment, and timeouts are program-defined, not a factory command interface. Use the Modbus Integration Guide when designing that interface.

2. PLC devices and instructions

2.1 Device areas

Area	Function	Limit to check
S	State relays, ordinary and retained	Obtain the firmware-specific upper device boundary
X	Digital inputs	Physical count follows the hardware; terminal labels use octal-style numbering
Y	Digital outputs	Only fitted channels exist; pulse output requires suitable transistor hardware
M	Internal relays, ordinary, retained, and special	Address range and special-device side effects
T	Timers: 100 ms, 10 ms, 1 ms, and accumulating groups	Time base, instruction behavior, and retention
C	Counters, including 32-bit and high-speed groups	Width, input assignment, and retention
D	Data and special-function registers	Ordinary and special D have separate Modbus regions
V/Z	Index registers V0–V7 and Z0–Z7	Required instruction behavior

Documented D areas are D0–D199 and D600–D7999 for ordinary data, D200–D599 for retained data, and D8000–D8150 for special retained data. Other documented retained areas are S512–S911, M512–M1535, C100–C199, and 32-bit C200–C255. Obtain the unit's retention method, retention duration, and write-endurance limits; test power-loss recovery before relying on retained data.

Allocate application data only in an ordinary region supported by the target firmware. Communication, analog, clock, and other special registers are not scratch storage. Use explicit initialization where the application must start with known values.

2.2 Timer groups

Timer range	Nominal time base	Type
T0–T199	100 ms	Ordinary
T200–T245	10 ms	Ordinary
T246–T249	1 ms	Accumulating
T250–T255	100 ms	Accumulating
T256–T511	1 ms	Ordinary

Select the time base before calculating a preset. Accumulating behavior is not a guarantee of retention through power loss. Check reset and restart behavior on the target firmware; scan and I/O delays affect the observed event timing.

2.3 Instructions

Documented instruction families include basic logic, set/reset and edge operations, jumps/subroutines, transfer/compare, integer and floating-point arithmetic, shift/rotate operations, timers/counters, serial communication, PID, clock operations, high-speed counting, and pulse/positioning.

Check the firmware-supported instructions and data types. Test execution order, scan timing, arithmetic limits, and required instruction behavior before integrating with live equipment.

3. Analog registers and scaling

Signal	Register	Access	Nominal raw range
AD0	D8030	Read input	0–4095
AD1	D8031	Read input	0–4095
DA0	D8050	Write output	0–4095

These channels apply to Y305-4421 and Y305-8821. Y305-4400 and Y305-8800 have no analog channels.

• Voltage = raw × 10 / 4095.
• Raw output target = desired voltage × 4095 / 10, rounded to an integer using the application's chosen rule.
• Clamp output commands to 0–4095 before writing D8050.
• Engineering value = minimum + raw × (maximum − minimum) / 4095 for a linear transducer spanning 0–10 V.

The ideal raw value at 5 V is 2047.5, so an integer command must use a defined rounding rule. The nominal step is about 2.442 mV. Neither value specifies measurement accuracy. Set acceptance tolerances from the unit's accuracy specification. Check overrange diagnostics and calibration requirements, and keep AO writes within range.

Check the sensor's transfer function and fault signals. A low reading does not necessarily represent a valid zero. See the Analog I/O and PID Guide for scaling and loop tests.

4. RS485 configuration

4.1 Registers and flags

Device	Function
D8120	Port 1 communication format
D8400	Port 2 communication format
D8121	Modbus station address; documented initial value 1
D8129	Communication timeout, ms
D8412	ADPRW retry count
M8029	Instruction completion
M8063	Serial communication error
M8409	Timeout indication
M8121	RS send-wait flag
M8122	RS send request
M8123	RS receive-complete flag
M8124	RS carrier-detect flag
M8161	RS 8-bit processing mode
D8122	RS remaining transmit count
D8123	RS receive-count monitor
D8124 / D8125	RS header / trailer
D8063	Serial communication error code

Before using two ports, check how D8121 and D8129 apply to each port, their permitted values, whether settings persist, and when changes take effect. Hardware configurations provide up to two RS485 ports.

4.2 Format word

Bits	Field	Documented values
0	Data length	1 = 8 bits; other values unspecified
2:1	Parity	00 = none; 01 = odd; 11 = even
3	Stop bits	0 = 1; 1 = 2
7:4	Baud code	Codes listed below
8	Header	0 = absent; 1 = present, RS mode using D8124
9	Trailer	0 = absent; 1 = present, RS mode using D8125
12:10	Reserved	Leave at the verified value
13	Additive checksum	0 = absent; 1 = added, RS mode only
14	Protocol	0 = Modbus; 1 = non-protocol RS
15	Role	0 = slave in Modbus mode; 1 = master

Baud code, hexadecimal	Bit rate, bit/s
1	300
4	600
5	1200
6	2400
7	4800
8	9600
9	19200
A	38400
B	56000
C	57600
D	115200

Verify the selected bit rate on the target firmware. Do not substitute a conventional baud-code sequence for these documented assignments.

4.3 Configuration examples

Format word	Interpretation
H0081	Modbus slave, 9600 bit/s, 8 data bits, no parity, 1 stop bit
H8081	Modbus master, 9600 bit/s, 8 data bits, no parity, 1 stop bit
HC081	Non-protocol RS, bit 15 set, 9600 bit/s, 8N1

H81 and H0081 denote the same hexadecimal value. Read the current serial settings before connecting; these examples do not specify factory settings. The example MOV K300 D8129 sets a 300 ms timeout; set the required timeout explicitly. Select timeout and retries for the slave's response time and the application's failure handling.

RS and ADPRW cannot run simultaneously under the documented restriction. Check the firmware's port-routing procedure. Test each port and the required simultaneous operation before connecting two buses.

5. Modbus addresses and data

5.1 Address convention

Modbus raw protocol addresses differ from the one-based offsets and 4xxxx reference labels that some host tools display. Select the host convention explicitly before entering an address.

Bit and register addresses occupy separate spaces. The function code determines which space a request accesses. A D register does not become an input register because it contains an input measurement.

5.2 Register and bit anchors

PLC device	Modbus space	Raw decimal	Raw hexadecimal
X0	Read-only bit input	1024	0x0400
Y0	Read/write bit output	1280	0x0500
M0	Read/write bit	2048	0x0800
D0	Holding register	4096	0x1000
D8000	Special holding register	3072	0x0C00

These are documented anchor addresses. Read function codes, X/Y numbering beyond the anchors, and target-firmware access still need tests. Keep physical outputs isolated for write tests and avoid competing host/PLC writes.

Analog register	Derived raw decimal	Derived raw hexadecimal	Calculation
D8030 / AD0	3102	0x0C1E	3072 + 30
D8031 / AD1	3103	0x0C1F	3072 + 31
D8050 / DA0	3122	0x0C32	3072 + 50

The analog offsets are derived from the D8000 anchor and require bench verification. Do not address D8030 as 4096 + 8030. The special D region uses a separate base.

The documented D8000 region is a holding-register space. FC03 is the standard read candidate, subject to target-firmware testing. Do not choose FC04 solely because AD0 is an analog input.

5.3 Access limits and data layout

Use the firmware-specific address map for block transfers, timer/counter values, 32-bit counters, and special relays. Start with single known addresses rather than scanning the complete PLC device space. Special-register writes can change communication or drive outputs.

Select a function supported by the addressed device. Master instruction examples below use FC04 (read input registers), FC06 (write single register), and FC16/0x10 (write multiple registers); master and slave support must be checked separately. Test required reads/writes, quantity limits, broadcasts, exceptions, and illegal-address responses on the intended firmware.

Check signedness per value, RS buffer byte packing, multi-register word order, and floating-point representation with a known test pattern. Standard Modbus wire rules do not establish how the PLC packs 32-bit values. The Modbus Integration Guide covers address checks and transaction handling.

6. ADPRW and RS instructions

6.1 ADPRW examples

These instruction fragments illustrate an input-register read and single- and multiple-register writes. Test them on the intended hardware and firmware before use.

Fragment	Operation
MOV H8081 D8120	Configure port 1 as Modbus master, 9600 bit/s, 8N1
MOV K300 D8129	Set a 300 ms timeout; choose the operating timeout for the actual slave
ADPRW H2 H6 H0A K0 D0	Station 2, FC06, remote raw address 0x000A, local data at D0
ADPRW H2 H10 H0A K5 D1	Station 2, FC16/0x10, write five registers from remote raw address 0x000A using D1–D5
ADPRW H2 H4 H0 K2 D10	Station 2, FC04, read two input registers from remote raw address 0 into D10–D11

K0 in the single-register example is the documented instruction-specific quantity convention for FC06; it is not a zero-register wire request. Keep that operand when reproducing the example, and test the complete transaction on the target firmware. The remote address belongs to the target slave and is not automatically Y305's address for D10.

These fragments omit ladder execution conditions. Add a tested trigger, completion, and error sequence before use, and prevent unintended repeated writes. They are not complete runnable programs. Use the transaction scheduler to prevent competing requests.

6.2 RS example

For this port-2 example, configure port 1 as slave and port 2 as master. Port 1 has documented sending priority when it remains master. Verify the selected physical port before transmitting; do not carry over a port-1 master configuration from the ADPRW example.

Fragment	Meaning
MOV H0C081 D8400	Configure port 2 for non-protocol RS, bit 15 set, 9600 bit/s, 8N1
MOV H306 D0	First word of the illustrated transmit buffer
MOV H0 D1	Second buffer word
MOV H1 D2	Third buffer word
CRC D0 D3 K6	Calculate CRC for the six-byte payload using this instruction convention
SET M8122	Request transmission
RS D0 K8 D100 K8	Send eight bytes from D0; receive up to eight bytes into D100
RST M8123	Clear the receive-complete flag

H0C081 and HC081 are the same hexadecimal value. The intended payload is 03 06 00 00 00 01, followed by two CRC bytes: a write of value 1 to station 3, FC06, raw register address 0. This operates a remote register; it is not a read-only connection test.

The fragments omit the complete ladder sequence. Establish M8161 mode, word-to-byte packing, CRC placement/order, and received-length behavior before use. Do not assume RS supplies Modbus framing automatically. The short example sets M8122 during initialization; it does not show how to request each subsequent send. A periodic call to RS alone does not establish continuous transmission.

Use the RS send/wait/validate sequence to handle repeated requests and replies. RS and ADPRW cannot operate simultaneously, including when different ports are selected.

7. High-speed functions and RTC

7.1 High-speed counter inputs

Counter	Documented input assignment
C235	X0, single phase
C236	X1, single phase
C237	X2, single phase
C238	X3, single phase
C239	X4, single phase
C240	X5, single phase
C251	X0/X1, A/B pair
C253	X3/X4, A/B pair
C255	X6/X7, A/B pair

Y305-4400/4421 expose X0–X3; Y305-8800/8821 expose X0–X7. These assignments are usable only where both the input and high-speed hardware are fitted. Allocate each input to one counter function. Use the input-frequency rating for the ordered hardware, signal type, counting mode, and simultaneous channel use. M8198 selects four-times counting in two-phase operation. Enable the counter through tested PLC logic and check direction, scaling, rollover, and restart behavior.

Do not use an L low-speed unit for high-speed counting or pulse output without channel-specific hardware ratings.

7.2 Pulse outputs

Y0/Y1 are the documented pulse-output assignments for suitable transistor hardware. Use the frequency and load ratings for the ordered configuration. Do not infer Y2/Y3 pulse capability from positioning-register names. Check channel count, waveform limits, shared resources, and instruction restrictions for the unit. Relay outputs cannot perform high-speed pulse positioning.

7.3 RTC registers

Register	Field
D8013	Seconds
D8014	Minutes
D8015	Hours
D8016	Day
D8017	Month
D8018	Year
D8019	Weekday

RTC hardware is optional. Use the unit's field encoding, weekday convention, year range, and setting procedure. Check coherent reads, backup duration, and power-loss recovery before using time-based control. Follow the firmware instructions for TRD/TWR before writing clock registers.

8. PID parameters

The PID operand form is PID S1 S2 S3 D: S1 is the target, S2 is measured feedback, S3 starts a ten-register parameter block, and D receives the result.

Relative register	Example base D20	Parameter
S3	D20	PID channel number, listed 0–4
S3+1 / S3+2	D21–D22	KP, floating-point
S3+3 / S3+4	D23–D24	KI, floating-point
S3+5 / S3+6	D25–D26	KD, floating-point
S3+7	D27	Error coefficient/threshold KE
S3+8	D28	Upper output limit PMAX
S3+9	D29	Lower output limit PMIN

This ten-register layout is implementation-specific. Do not substitute another PLC's PID parameter block. Execution period, gain units, numeric encoding, initialization, anti-windup behavior, and sensor-failure response need tests before closed-loop operation.

S2 must contain live measured feedback. A fixed feedback value can cause integral saturation and abnormal control. Scale target and feedback consistently and bound the output.

D is the program-selected destination. Choosing D8050 drives DA0 directly. During commissioning, calculate into a verified ordinary D register, check and clamp the result, then transfer it to D8050 through the output-control logic. Keep the plant disconnected until simulated or limited-energy loop tests pass. See the Analog I/O and PID Guide for the test procedure.

8.1 Remote-feedback example

On a unit with RS485 and analog output fitted, the instruction fragments below read an external instrument and calculate a local AO command. Feedback comes over Modbus, rather than from AD0 or AD1.

Fragment	Meaning
MOV H8081 D8120	Port 1, Modbus master, 9600 bit/s, 8N1
ADPRW H1 H3 H0 K1 D10	Slave 1, FC03: read one holding register from raw address 0 into D10
PID D0 D10 D20 D8050	Setpoint D0, feedback D10, parameter block D20–D29, result to D8050

This PID fragment writes the physical analog output. Calculation channels 0–4 are not five physical analog outputs; Y305-4421/8821 each have one AO. During commissioning, use ordinary D scratch storage for the result, then validate, limit, and map the command through the final output-control path.

The example's numeric setpoint and gains do not specify physical units or recommended tuning. The source initializes floating-point gains with DEMOV; do not substitute single-word integer values or a different PLC's parameter format.

The accompanying initialization uses these values. They explain the operand allocation and are not tuning defaults:

Initialization fragment	Meaning
MOV K400 D0	Example setpoint 400, with no defined engineering unit
MOV K0 D20	PID calculation channel 0
DEMOV E500 D21	KP = 500.0, occupying D21–D22
DEMOV E0.1 D23	KI = 0.1, occupying D23–D24
DEMOV E0 D25	KD = 0.0, occupying D25–D26
MOV K3 D27	KE = 3 in the example's error scale
MOV K4095 D28	PMAX = 4095
MOV K0 D29	PMIN = 0

Reserve the complete D20–D29 block before loading any of these values. DEMOV denotes the floating-point move shown in this example; its two-word destination must not overlap other data. Check control direction, gain units, and execution timing before choosing parameters for an actual process.

A read and PID call triggered by the same timer can use the previous feedback value. Wait for a valid transaction result, check measurement age, and scale the value before accepting it as new feedback. A nominal timer interval does not define the PID algorithm's internal sampling period. See the remote-feedback control sequence.